Algorithmic approach for optimizing page fault to increase processor performance along with thread-level speculation (Record no. 97203)

MARC details
000 -LEADER
fixed length control field nam a22 7a 4500
005 - DATE AND TIME OF LATEST TRANSACTION
control field 20200310143712.0
008 - FIXED-LENGTH DATA ELEMENTS--GENERAL INFORMATION
fixed length control field 181008b ||||| |||| 00| 0 eng d
080 ## - UNIVERSAL DECIMAL CLASSIFICATION NUMBER
Universal Decimal Classification number 004.2
Item number JIS T
100 ## - MAIN ENTRY--PERSONAL NAME
Personal name Jisha Abraham P.
245 ## - TITLE STATEMENT
Title Algorithmic approach for optimizing page fault to increase processor performance along with thread-level speculation
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication, distribution, etc Kochi,CUSAT
Name of publisher, distributor, etc Department of Computer science
Date of publication, distribution, etc 2017
300 ## - PHYSICAL DESCRIPTION
Extent xvii,149p.
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Processor performance enhancement
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Page fault optimization
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Page replacement techniques
653 ## - INDEX TERM--UNCONTROLLED
Uncontrolled term Processor performance
942 ## - ADDED ENTRY ELEMENTS (KOHA)
item type Theses
Holdings
Lost status Source of classification or shelving scheme Not for loan Home library Current library Date acquired Total Checkouts Full call number Barcode Date last seen Price effective from Koha item type
  Universal Decimal Classification   University Library University Library 08/10/2018   004.2 JIS T T0001251 08/10/2018 08/10/2018 Theses
University Library, CUSAT