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System-on-chip test architectures: nanometer design for testability

By: Contributor(s): Publication details: Boston Morgan Kaufmann 2008Edition: Description: xxxiii, 856pISBN:
  • 9780123739735
ISSN:
Subject(s): DDC classification:
  • 621.9
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Holdings
Item type Current library Call number Status Date due Barcode
Books Books University Library 621.9 WAN (Browse shelf(Opens below)) Available 00059065

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University Library, CUSAT