000 00753nam a2200253 a 4500
001 adlib96000001
003 ViArRB
005 200902210153555.7
008 960221s1955 dcuabcdjdbkoqu001 0deng d
020 _a0-8186-7716-3
022 _a
040 _aAdlib
082 _a621.327.02
245 _aDigital Design and Modeling with VHDL and Synthesis.
250 _a
260 _aCalifornia
_bIEEE Computer Society
_c1997
300 _axvi, 345p
_c
500 _a
100 _aChang, K.C
_e
700 _a
_a
942 _cBK
653 _aVERY HIGH SPEED INTEGRATED CIRCUITS-DESIGN AND CONSTRUCTION-DATA
952 _w2010-06-16
_p00043923
_r2012-09-19
_40
_00
_bUL
_10
_o621.327.02 CHA
_d2010-06-16
_70
_yBK
_s2012-08-16
_l1
_aUL
999 _c38693
_d38692