| 000 | 00796nam a2200253 a 4500 | ||
|---|---|---|---|
| 001 | adlib96000001 | ||
| 003 | ViArRB | ||
| 005 | 200902210153555.7 | ||
| 008 | 960221s1955 dcuabcdjdbkoqu001 0deng d | ||
| 020 | _a9781420051544 | ||
| 022 | _a | ||
| 040 | _aAdlib | ||
| 082 | _a621.3.049.77 | ||
| 245 | _aVerilog HDL:digitall design and modeling | ||
| 250 | _a | ||
| 260 |
_aNew York _bCRC Press _c2007 |
||
| 300 |
_axviii,900p _c |
||
| 500 | _a | ||
| 100 |
_aCavanagh, Joseph _e |
||
| 700 |
_a _a |
||
| 942 | _cBK | ||
| 653 |
_aDigital electronics _aElectronics _aLogic circuits - computer aided design _aVerilog -Computer hardware description language |
||
| 952 |
_w2010-06-16 _p00060736 _r2012-07-27 _40 _00 _bUL _10 _o621.3.049.77 CAV _d2010-06-16 _70 _yBK _s2012-07-26 _l1 _aUL |
||
| 999 |
_c56074 _d56073 |
||