000 00793nam a22001937a 4500
005 20120203152230.0
008 120203t xxu||||| |||| 00| 0 eng d
080 _a681.14:004.2
_bREK
100 _aRekha K. James
_919136
245 _aDesign and synthesis of effecient mac architectures for high speed decimal processor (Thesis)
_cRekha K. James; guided by K. Poulose Jacob and Sreela Sasi
300 _a224p.
653 _aDecimal processor
_aDecimal and loating point
700 _aPoulose Jacob, K; guided by
_919134
700 _aSreela Sasi; guided by
_919135
942 _cTH
260 _aKochi
_bDepartment of Computer science, CUSAT
_c2010
_919137
500 _aThesis
952 _pT0000054
_40
_00
_bUL
_10
_o681.14:004.2 REK T
_d2012-02-03
_71
_cREF
_2udc
_yTH
_aUL
999 _c74753
_d74752